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Date: | Sat, 26 Dec 2015 15:53:03 -0600 |
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Subject: | Re: [geda-user] A fileformat library |
From: | "Peter Clifton (petercjclifton AT googlemail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com> |
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Indeed... 1 & 2 relate to design, reuse, modularity etc.. 3 & 4 I feel would fit into the category of DRC rule definition / design intent capture. PCB's data model isn't as bad as some would have you believe, but it isn't pretty - and could (as many have noted) benefit from some changes. I would argue that the DRC definitions / design intent capture should probably be designed to have the capability of standing alone from the PCB layer geometry design file (even if they can also live inside it too). We'll need a data-model, as well as (probably) an on-disk representation / encoding of that information. The design intent data may come in from external tools (with which we'd need to interchange), be they tools to extract data from another format (eg. schematic?), or an external editor to input such information. This is an interesting area for some design work... start to think of how all these design rules can be formally defined. How would (ideally all of) PCB's existing design rules be represented in this format? Do some research (of publicly available information, tutorials etc..) to see what the capability set of other tools out there is in this regard. There will certainly be other cases that should be considered for DRC rule specification.. some examples (off the top of my head), could be differential pair spacing, maximum decoupled length, maximum pair skew, .... These may not be all that easy to define explicitly, but we should try! Peter
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