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Tue, 29 Dec 2015 00:25:28 -0800 (PST) | |
Date: | Tue, 29 Dec 2015 09:25:23 +0100 |
From: | "Nicklas Karlsson (nicklas DOT karlsson17 AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com> |
To: | geda-user AT delorie DOT com |
Subject: | Re: [geda-user] Project leadership (generic, buses) |
Message-Id: | <20151229092523.e1209f12e48386ec92457dee@gmail.com> |
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<43CC8F96-6452-40FA-9DFB-E0983721C19C AT noqsi DOT com> | |
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> > On 28 December 2015 at 20:48, John Doty <jpd AT noqsi DOT com> wrote: > >> There are really two projects here: The original gEDA (now confusingly > >> called geda-gaf), and pcb. I think everyone agrees that pcb needs a lot of > >> work. On the other hand, geda-gaf is matiure, effective, and easy to extend > >> with scripting. Pcb development requires a great deal of collaboration. > >> Geda-gaf development mostly does not, as anybody can write and publish a > >> script. > > > > I would not call a generic schematic capture tool mature until it > > provides the designer use of buses and bus pins in his design without > > the need to actually name the nets to have connection. > > I believe Paul Tan does this in his Verilog flow. > > > > > -- > > Svenn > > > > John Doty Noqsi Aerospace, Ltd. > http://www.noqsi.com/ > jpd AT noqsi DOT com Then it is certainly very generic: ASIC, Circuit boards, cables connecting circuit boards, Verilog, VHDL? Nicklas Karlsson
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