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Tue, 29 Dec 2015 15:03:24 -0800 (PST) | |
Date: | Wed, 30 Dec 2015 00:03:22 +0100 |
From: | "Nicklas Karlsson (nicklas DOT karlsson17 AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com> |
To: | geda-user AT delorie DOT com |
Subject: | Re: [geda-user] (design error in the core of gschem --> bus |
element) | |
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> On 29 December 2015 at 21:29, John Doty <jpd AT noqsi DOT com> wrote: > > The bus is cosmetic sugar, as always. The box is not: it’s an actual symbol with a refdes and footprint for gnetlist to chew on. > > I think it is a valid wish to have a more proper functionality of the > bus element within a generic schematic drawing tool. I like your > magic-behind-the-scene way of integrating external data into a > netlist, but it is probably best when putting an FPGA on a PCB and not > to do the top level interconnection inside the FPGA where the direct > visibility of the connections are needed. > > -- > Svenn To figure how bus element should work then using in gschem is also useful.
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