Mail Archives: geda-user/2018/12/17/22:46:45
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On Mon, 17 Dec 2018, Sergey Alyoshin (alyoshin DOT s AT gmail DOT com) [via geda-user AT delorie DOT com] wrote:
>On Mon, Dec 17, 2018 at 3:53 PM <gedau AT igor2 DOT repo DOT hu> wrote:
>> Sergey, please consider rolling a RC tarball, I'd be happy to test that.
>> If that's not possible, I'll test the release tarball after the release.
>
>https://sourceforge.net/projects/gerbv/files/gerbv/gerbv-2.7/gerbv-2.7rc0.tar.gz/download
Thank you!
Unpacked, configured and compiled on a Debian testing. Everyhting worked
fine. It also runs fine from source.
I found a few minor UI things and a few more significant bugs in the new
pcb exporter - nothing critical, nothing that should delay the release,
tho.
(I'd probably mark pcb exporter as beta and list these bugs in BUGS and
work on them after the release.)
1. GUI; first I've clicked through all menus and icons. Generally
everything worked perfectly, except for the following few.
- View/full screen (F11) -> didn't do anything here; FYI, gerbv 2.6A
shipped with Debian behaves the same. I am using an "unusual" window
manager (a modified version of dwm in floating mode).
- help/about/credits: I don't see your name on the list, while you have
worked a lot on gerbv in the last few months; missing from AUTHORS as well
- minor feature request: it would be real nice to have a hotkey for all
layers on and all layers off
2. file formats
- attached is a valid looking gerber file (plated-drill.gbr) that does not
define any object; it has apertures and an end of program marker. I think
it has enough headers and footer to make sure what it is. I'd expect to
get an empty layer for this file but I get an unknown file format error.
- exporting to pcb: the file does work with both pcb-rnd and pcb 4.0.1.
However, having a file without a group string is not nice. Hardwiring
layer 7 for outline is not nice either, and that '7' depends on the user
didn't change the default layer stackup. If we are exporting a single
copper layer, we shouldn't have an outline anyway. But what we should
have, because pcb's layer stack description depends on it: two silk
layers, even if empty. Attached is a minimal template that has one
gerbv-export layer, the two empty silk layers and a valid layer groups
description. This file does not depend on user defaults and ends up with a
single, top copper layer in both pcb-rnd and pcb-4.0.1.
- exporting to pcb: clearpoly bug; you are exporting the as-drawn version
of the polygons - this means the contour you export already contains all
clearances and is "1:1 how it looks on copper". In this case, please do
not add the "clearpoly" flag to the polygon because that will allow lines,
arcs and text objects to cut out new clearances from the polygon. Test
file for the bug attached as clearpoly.lht, you can use 'pcb-rnd -x gerber
clearpoly.lht' to export it (sending the lht so you can test full round
trips)
- exporting to pcb: broken arc, see round trip on arc.lht
- export to pcb: exporting broken polygons, see badpoly.gbr. (This is a
typical error 3rd party software writing .pcb usually do, that's why I
tested it.) Geda/pcb and pcb-rnd do not accept self-intersecting polygons,
even tho it is possible to describe such construct in the file format. If
you compile the debug version, you will get an assert. I know the
production version won't assert, and seeming will work on the file, but it
will show random wierd bugs on rendering, exporting and polygon editing on
clearance calculation. I am not sure whether it's legal in gerber; if not,
I recommend doing input checks and error reporting; if it is legal in
gerber, the check needs to be done on export. I'd say at least warn the
user that the resulting file is invalid or omit the offending polygon, or
(best solution) export a set of valid polygons instead.
- exporting to pcb: broken positive-negative layer combinations, see
posneg.lht. This one is a rather complicated one, because geda/pcb does
not support layer compositing at all and pcb-rnd doesn't support layer
composition in copper. The best you can do is export everything as "as
drawn" polygons when compositing is used. Why this is important: the
positive-negative layers in gerber are often used to create clearances.
geda/pcb doesn't do this, so you have good round trips in pcb-gerbv-pcb
relation, but other EDA tools do use this. The most trivial use is drawing
a positive polygon then a 18 mil negative line and then a 10 milpositive
line at the same coords - this is how a line with a clearance encoded with
high resolution without having to draw the line-in-polygon clearance as
poly contour. But I know about data models where pin thermal is simply
a set of user specified, negatively drawn objects which is just thrown on
top of everything - it clears polygons or anything else. If you don't have
support for such export back to pcb, it would be nice to make it very
clear (i.e. throw a warning when negative objects are found), because I
think the main use case for this feature wouldn't be pcb-gerbv-pcb but
randomEDA-gerbv-pcb.
HTH,
Igor2
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