From: gpt20 AT thor DOT cam DOT ac DOT uk (G.P. Tootell) Newsgroups: comp.os.msdos.djgpp Subject: Re: Optimization Date: 29 Nov 1996 23:47:12 GMT Organization: University of Cambridge, England Lines: 13 Sender: gpt20 AT hammer DOT thor DOT cam DOT ac DOT uk (G.P. Tootell) Message-ID: <57nsm0$cvp@lyra.csx.cam.ac.uk> References: <57hg9b$or5 AT kannews DOT ca DOT newbridge DOT com> <329C95AD DOT C3E AT silo DOT csci DOT unt DOT edu> <57k531$5bu AT kannews DOT ca DOT newbridge DOT com> NNTP-Posting-Host: hammer.thor.cam.ac.uk To: djgpp AT delorie DOT com DJ-Gateway: from newsgroup comp.os.msdos.djgpp |> "To gain efficiency in the implementation of the internal cache, storage is |> allocated in chunks of 128 bits, called cache lines. External caches are not |> likely to use cache lines smaller than those of the internal cache." |> [...] |> "To simplify the hardware implementation, cache lines can only be mapped to |> aligned 128-bit blocks of main memory." ok. i'm confused now. i thought the cache was 32 bytes but 128 bits is 16 bytes no? so just how big is the cache :) or did it change between the 486 and pentium? nik --