From: Paul Shirley <Paul AT chocolat DOT foobar DOT co DOT uk>
Newsgroups: comp.os.msdos.djgpp
Subject: Re: Optimization
Date: Fri, 29 Nov 1996 23:31:59 +0000
Organization: DrinkSoft
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References: <57hg9b$or5 AT kannews DOT ca DOT newbridge DOT com> <329C4CD4 DOT 7474 AT cornell DOT edu>
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In article <57k1et$4od AT kannews DOT ca DOT newbridge DOT com>, Glen Miner
<gminer AT Newbridge DOT COM> writes
>That is quite sad. I mean, in a register starved architecture, I can't do
>the compiler a favor by giving it byte sized data... Hmm. Someday I'll be
>able to afford a real processor...

...80x86 processors are unusual in allowing access to byte sized chunks
of registers, most only allow use of the low end of registers. It's not
really surprising gcc won't use the feature. Worse, on P5 and later
using writing 1 byte of a register locks the entire register, this can
cause extra pipeline stalls (another then gcc does not currently deal
with)

-- 
Paul Shirley