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From: | Paul Shirley <Paul AT chocolat DOT foobar DOT co DOT uk> |
Newsgroups: | comp.os.msdos.djgpp |
Subject: | Re: Optimization |
Date: | Fri, 29 Nov 1996 23:31:59 +0000 |
Organization: | DrinkSoft |
Lines: | 15 |
Distribution: | world |
Message-ID: | <KZ8MkCAvJ3nyEwZJ@chocolat.foobar.co.uk> |
References: | <57hg9b$or5 AT kannews DOT ca DOT newbridge DOT com> <329C4CD4 DOT 7474 AT cornell DOT edu> |
<Pine DOT SUN DOT 3 DOT 90 DOT 961127095705 DOT 25056B-100000 AT coop10> | |
<329C62F6 DOT 23F6 AT stud DOT warande DOT ruu DOT nl> <57k1et$4od AT kannews DOT ca DOT newbridge DOT com> | |
NNTP-Posting-Host: | chocolat.foobar.co.uk |
Mime-Version: | 1.0 |
To: | djgpp AT delorie DOT com |
DJ-Gateway: | from newsgroup comp.os.msdos.djgpp |
In article <57k1et$4od AT kannews DOT ca DOT newbridge DOT com>, Glen Miner <gminer AT Newbridge DOT COM> writes >That is quite sad. I mean, in a register starved architecture, I can't do >the compiler a favor by giving it byte sized data... Hmm. Someday I'll be >able to afford a real processor... ...80x86 processors are unusual in allowing access to byte sized chunks of registers, most only allow use of the low end of registers. It's not really surprising gcc won't use the feature. Worse, on P5 and later using writing 1 byte of a register locks the entire register, this can cause extra pipeline stalls (another then gcc does not currently deal with) -- Paul Shirley
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